\contentsline {chapter}{\numberline {1}Information Representation and Storage}{1}{chapter.1}
\contentsline {section}{\numberline {1.1}Introduction}{1}{section.1.1}
\contentsline {section}{\numberline {1.2}Bits and Bytes}{1}{section.1.2}
\contentsline {subsection}{\numberline {1.2.1}``Binary Digits''}{1}{subsection.1.2.1}
\contentsline {subsection}{\numberline {1.2.2}Hex Notation}{2}{subsection.1.2.2}
\contentsline {subsection}{\numberline {1.2.3}There Is No Such Thing As ``Hex'' Storage at the Machine Level!}{4}{subsection.1.2.3}
\contentsline {section}{\numberline {1.3}Main Memory Organization}{4}{section.1.3}
\contentsline {subsection}{\numberline {1.3.1}Bytes, Words and Addresses}{4}{subsection.1.3.1}
\contentsline {subsubsection}{\numberline {1.3.1.1}The Basics}{4}{subsubsection.1.3.1.1}
\contentsline {subsubsection}{\numberline {1.3.1.2}Word Addresses}{5}{subsubsection.1.3.1.2}
\contentsline {subsubsection}{\numberline {1.3.1.3}{}``Endian-ness{}''}{5}{subsubsection.1.3.1.3}
\contentsline {subsubsection}{\numberline {1.3.1.4}Other Issues}{7}{subsubsection.1.3.1.4}
\contentsline {section}{\numberline {1.4}Representing Information as Bit Strings}{9}{section.1.4}
\contentsline {subsection}{\numberline {1.4.1}Representing Integer Data}{9}{subsection.1.4.1}
\contentsline {subsection}{\numberline {1.4.2}Representing Real Number Data}{12}{subsection.1.4.2}
\contentsline {subsubsection}{\numberline {1.4.2.1}``Toy'' Example}{13}{subsubsection.1.4.2.1}
\contentsline {subsubsection}{\numberline {1.4.2.2}IEEE Standard}{13}{subsubsection.1.4.2.2}
\contentsline {subsection}{\numberline {1.4.3}Representing Character Data}{16}{subsection.1.4.3}
\contentsline {subsection}{\numberline {1.4.4}Representing Machine Instructions}{16}{subsection.1.4.4}
\contentsline {subsection}{\numberline {1.4.5}What Type of Information is Stored Here?}{17}{subsection.1.4.5}
\contentsline {section}{\numberline {1.5}Examples of the Theme, ``There Are No Types at the Hardware Level''}{18}{section.1.5}
\contentsline {subsection}{\numberline {1.5.1}Example}{18}{subsection.1.5.1}
\contentsline {subsection}{\numberline {1.5.2}Example}{19}{subsection.1.5.2}
\contentsline {subsection}{\numberline {1.5.3}Example}{20}{subsection.1.5.3}
\contentsline {subsection}{\numberline {1.5.4}Example}{21}{subsection.1.5.4}
\contentsline {subsection}{\numberline {1.5.5}Example}{21}{subsection.1.5.5}
\contentsline {subsection}{\numberline {1.5.6}Example}{22}{subsection.1.5.6}
\contentsline {section}{\numberline {1.6}Visual Display}{23}{section.1.6}
\contentsline {subsection}{\numberline {1.6.1}The Basics}{23}{subsection.1.6.1}
\contentsline {subsection}{\numberline {1.6.2}Non-English Text}{24}{subsection.1.6.2}
\contentsline {subsection}{\numberline {1.6.3}It's the Software, Not the Hardware}{24}{subsection.1.6.3}
\contentsline {subsection}{\numberline {1.6.4}Text Cursor Movement}{24}{subsection.1.6.4}
\contentsline {subsection}{\numberline {1.6.5}Mouse Actions}{25}{subsection.1.6.5}
\contentsline {subsection}{\numberline {1.6.6}Display of Images}{26}{subsection.1.6.6}
\contentsline {section}{\numberline {1.7}There's Really No Such Thing As ``Type'' for Disk Files Either}{26}{section.1.7}
\contentsline {subsection}{\numberline {1.7.1}Disk Geometry}{26}{subsection.1.7.1}
\contentsline {subsection}{\numberline {1.7.2}Definitions of ``Text File'' and ``Binary File''}{26}{subsection.1.7.2}
\contentsline {subsection}{\numberline {1.7.3}Programs That Access of Text Files}{27}{subsection.1.7.3}
\contentsline {subsection}{\numberline {1.7.4}Programs That Access ``Binary'' Files}{28}{subsection.1.7.4}
\contentsline {section}{\numberline {1.8}Storage of Variables in HLL Programs}{29}{section.1.8}
\contentsline {subsection}{\numberline {1.8.1}What Are HLL Variables, Anyway?}{29}{subsection.1.8.1}
\contentsline {subsection}{\numberline {1.8.2}Order of Storage}{29}{subsection.1.8.2}
\contentsline {subsubsection}{\numberline {1.8.2.1}Scalar Types}{30}{subsubsection.1.8.2.1}
\contentsline {subsubsection}{\numberline {1.8.2.2}Complex Data Structures}{31}{subsubsection.1.8.2.2}
\contentsline {subsubsection}{\numberline {1.8.2.3}Pointer Variables}{32}{subsubsection.1.8.2.3}
\contentsline {subsection}{\numberline {1.8.3}Local Variables}{33}{subsection.1.8.3}
\contentsline {subsection}{\numberline {1.8.4}Variable Names and Types Are Imaginary}{34}{subsection.1.8.4}
\contentsline {subsection}{\numberline {1.8.5}Segmentation Faults and Bus Errors}{35}{subsection.1.8.5}
\contentsline {section}{\numberline {1.9}ASCII Table}{37}{section.1.9}
\contentsline {section}{\numberline {1.10}An Example of How One Can Exploit Big-Endian Machines for Fast Character String Sorting}{38}{section.1.10}
\contentsline {section}{\numberline {1.11}How to Inspect the Bits of a Floating-Point Variable}{39}{section.1.11}
\contentsline {chapter}{\numberline {2}Major Components of Computer {}``Engines{}''}{41}{chapter.2}
\contentsline {section}{\numberline {2.1}Introduction}{41}{section.2.1}
\contentsline {section}{\numberline {2.2}Major Hardware Components of the Engine}{42}{section.2.2}
\contentsline {subsection}{\numberline {2.2.1}System Components}{42}{subsection.2.2.1}
\contentsline {subsection}{\numberline {2.2.2}CPU Components}{45}{subsection.2.2.2}
\contentsline {subsubsection}{\numberline {2.2.2.1}Intel/Generic Components}{45}{subsubsection.2.2.2.1}
\contentsline {subsubsection}{\numberline {2.2.2.2}History of Intel CPU Structure}{48}{subsubsection.2.2.2.2}
\contentsline {subsection}{\numberline {2.2.3}The CPU Fetch/Execute Cycle}{49}{subsection.2.2.3}
\contentsline {section}{\numberline {2.3}Software Components of the Computer {}``Engine{}''}{50}{section.2.3}
\contentsline {section}{\numberline {2.4}Speed of a Computer {}``Engine{}''}{51}{section.2.4}
\contentsline {subsection}{\numberline {2.4.1}CPU Architecture}{52}{subsection.2.4.1}
\contentsline {subsection}{\numberline {2.4.2}Parallel Operations}{52}{subsection.2.4.2}
\contentsline {subsection}{\numberline {2.4.3}Clock Rate}{53}{subsection.2.4.3}
\contentsline {subsection}{\numberline {2.4.4}Memory Caches}{54}{subsection.2.4.4}
\contentsline {subsubsection}{\numberline {2.4.4.1}Need for Caching}{54}{subsubsection.2.4.4.1}
\contentsline {subsubsection}{\numberline {2.4.4.2}Basic Idea of a Cache}{54}{subsubsection.2.4.4.2}
\contentsline {subsubsection}{\numberline {2.4.4.3}Blocks and Lines}{55}{subsubsection.2.4.4.3}
\contentsline {subsubsection}{\numberline {2.4.4.4}Direct-Mapped Policy}{56}{subsubsection.2.4.4.4}
\contentsline {subsubsection}{\numberline {2.4.4.5}What About Writes?}{57}{subsubsection.2.4.4.5}
\contentsline {subsubsection}{\numberline {2.4.4.6}Programmability}{57}{subsubsection.2.4.4.6}
\contentsline {subsubsection}{\numberline {2.4.4.7}Details on the Tag and Misc. Line Information}{57}{subsubsection.2.4.4.7}
\contentsline {subsubsection}{\numberline {2.4.4.8}Why Caches Usually Work So Well}{58}{subsubsection.2.4.4.8}
\contentsline {subsection}{\numberline {2.4.5}Disk Caches}{58}{subsection.2.4.5}
\contentsline {subsection}{\numberline {2.4.6}Web Caches}{59}{subsection.2.4.6}
\contentsline {chapter}{\numberline {3}Introduction to Linux Intel Assembly Language}{61}{chapter.3}
\contentsline {section}{\numberline {3.1}Overview of Intel CPUs}{61}{section.3.1}
\contentsline {subsection}{\numberline {3.1.1}Computer Organization}{61}{subsection.3.1.1}
\contentsline {subsection}{\numberline {3.1.2}CPU Architecture}{62}{subsection.3.1.2}
\contentsline {subsection}{\numberline {3.1.3}The Intel Architecture}{62}{subsection.3.1.3}
\contentsline {section}{\numberline {3.2}What Is Assembly Language?}{63}{section.3.2}
\contentsline {section}{\numberline {3.3}Different Assemblers}{64}{section.3.3}
\contentsline {section}{\numberline {3.4}Sample Program}{64}{section.3.4}
\contentsline {subsection}{\numberline {3.4.1}Analysis}{65}{subsection.3.4.1}
\contentsline {subsection}{\numberline {3.4.2}Source and Destination Operands}{70}{subsection.3.4.2}
\contentsline {subsection}{\numberline {3.4.3}Remember: No Names, No Types at the Machine Level}{70}{subsection.3.4.3}
\contentsline {subsection}{\numberline {3.4.4}Dynamic Memory Is Just an Illusion}{71}{subsection.3.4.4}
\contentsline {section}{\numberline {3.5}Use of Registers Versus Memory}{72}{section.3.5}
\contentsline {section}{\numberline {3.6}Another Example}{72}{section.3.6}
\contentsline {section}{\numberline {3.7}Addressing Modes}{76}{section.3.7}
\contentsline {section}{\numberline {3.8}Assembling and Linking into an Executable File}{77}{section.3.8}
\contentsline {subsection}{\numberline {3.8.1}Assembler Command-Line Syntax}{77}{subsection.3.8.1}
\contentsline {subsection}{\numberline {3.8.2}Linking}{78}{subsection.3.8.2}
\contentsline {subsection}{\numberline {3.8.3}Makefiles}{78}{subsection.3.8.3}
\contentsline {section}{\numberline {3.9}How to Execute Those Sample Programs}{79}{section.3.9}
\contentsline {subsection}{\numberline {3.9.1}{}``Normal{}'' Execution Won't Work}{79}{subsection.3.9.1}
\contentsline {subsection}{\numberline {3.9.2}Running Our Assembly Programs Using GDB/DDD}{80}{subsection.3.9.2}
\contentsline {subsubsection}{\numberline {3.9.2.1}Using DDD for Executing Our Assembly Programs}{80}{subsubsection.3.9.2.1}
\contentsline {subsubsection}{\numberline {3.9.2.2}Using GDB for Executing Our Assembly Programs}{81}{subsubsection.3.9.2.2}
\contentsline {section}{\numberline {3.10}How to Debug Assembly Language Programs}{82}{section.3.10}
\contentsline {subsection}{\numberline {3.10.1}Use a Debugging Tool for ALL of Your Programming, in EVERY Class}{82}{subsection.3.10.1}
\contentsline {subsection}{\numberline {3.10.2}General Principles}{83}{subsection.3.10.2}
\contentsline {subsubsection}{\numberline {3.10.2.1}The Principle of Confirmation}{83}{subsubsection.3.10.2.1}
\contentsline {subsubsection}{\numberline {3.10.2.2}Don't Just \relax $\@@underline {\hbox {Write}}\mathsurround \z@ $\relax Top-Down, But \relax $\@@underline {\hbox {Debug}}\mathsurround \z@ $\relax That Way Too}{83}{subsubsection.3.10.2.2}
\contentsline {subsection}{\numberline {3.10.3}Assembly Language-Specific Tips}{83}{subsection.3.10.3}
\contentsline {subsubsection}{\numberline {3.10.3.1}Know Where Your Data Is}{83}{subsubsection.3.10.3.1}
\contentsline {subsubsection}{\numberline {3.10.3.2}Seg Faults}{84}{subsubsection.3.10.3.2}
\contentsline {subsection}{\numberline {3.10.4}Use of DDD for Debugging Assembly Programs}{85}{subsection.3.10.4}
\contentsline {subsection}{\numberline {3.10.5}Use of GDB for Debugging Assembly Programs}{85}{subsection.3.10.5}
\contentsline {subsubsection}{\numberline {3.10.5.1}Assembly-Language Commands}{85}{subsubsection.3.10.5.1}
\contentsline {subsubsection}{\numberline {3.10.5.2}TUI Mode}{87}{subsubsection.3.10.5.2}
\contentsline {subsubsection}{\numberline {3.10.5.3}CGDB}{87}{subsubsection.3.10.5.3}
\contentsline {section}{\numberline {3.11}Some More Operand Sizes}{88}{section.3.11}
\contentsline {section}{\numberline {3.12}Some More Addressing Modes}{89}{section.3.12}
\contentsline {section}{\numberline {3.13}Inline Assembly Code for C++}{92}{section.3.13}
\contentsline {section}{\numberline {3.14}Example: Counting Lower-Case letters}{93}{section.3.14}
\contentsline {section}{\numberline {3.15}``Linux Intel Assembly Language'': Why ``Intel''? Why ``Linux''?}{94}{section.3.15}
\contentsline {section}{\numberline {3.16}Viewing the Assembly Language Version of the Compiled Code}{94}{section.3.16}
\contentsline {section}{\numberline {3.17}String Operations}{95}{section.3.17}
\contentsline {section}{\numberline {3.18}Useful Web Links}{97}{section.3.18}
\contentsline {section}{\numberline {3.19}Top-Down Programming}{97}{section.3.19}
\contentsline {chapter}{\numberline {4}More on Intel Arithmetic and Logic Operations}{99}{chapter.4}
\contentsline {section}{\numberline {4.1}Instructions for Multiplication and Division}{99}{section.4.1}
\contentsline {subsection}{\numberline {4.1.1}Multiplication}{99}{subsection.4.1.1}
\contentsline {subsubsection}{\numberline {4.1.1.1}The IMUL Instruction}{99}{subsubsection.4.1.1.1}
\contentsline {subsubsection}{\numberline {4.1.1.2}Issues of Sign}{100}{subsubsection.4.1.1.2}
\contentsline {subsection}{\numberline {4.1.2}Division}{100}{subsection.4.1.2}
\contentsline {subsubsection}{\numberline {4.1.2.1}The IDIV Instruction}{100}{subsubsection.4.1.2.1}
\contentsline {subsubsection}{\numberline {4.1.2.2}Issues of Sign}{100}{subsubsection.4.1.2.2}
\contentsline {subsection}{\numberline {4.1.3}Example}{101}{subsection.4.1.3}
\contentsline {section}{\numberline {4.2}More on Carry and Overflow, and More Jump Instructions}{102}{section.4.2}
\contentsline {section}{\numberline {4.3}Logical Instructions}{104}{section.4.3}
\contentsline {section}{\numberline {4.4}Floating-Point}{108}{section.4.4}
\contentsline {chapter}{\numberline {5}Introduction to Intel Machine Language}{111}{chapter.5}
\contentsline {section}{\numberline {5.1}Overview}{111}{section.5.1}
\contentsline {section}{\numberline {5.2}Relation of Assembly Language to Machine Language}{111}{section.5.2}
\contentsline {section}{\numberline {5.3}Example Program}{112}{section.5.3}
\contentsline {subsection}{\numberline {5.3.1}The Code}{112}{subsection.5.3.1}
\contentsline {subsection}{\numberline {5.3.2}Feedback from the Assembler}{114}{subsection.5.3.2}
\contentsline {subsection}{\numberline {5.3.3}A Few Instruction Formats}{114}{subsection.5.3.3}
\contentsline {subsection}{\numberline {5.3.4}Format and Operation of Jump Instructions}{115}{subsection.5.3.4}
\contentsline {subsection}{\numberline {5.3.5}Other Issues}{116}{subsection.5.3.5}
\contentsline {section}{\numberline {5.4}It Really Is Just a Mechanical Process}{117}{section.5.4}
\contentsline {section}{\numberline {5.5}You Could Write an Assembler!}{118}{section.5.5}
\contentsline {chapter}{\numberline {6}Compilation and Linking Process}{119}{chapter.6}
\contentsline {section}{\numberline {6.1}GCC Operations}{119}{section.6.1}
\contentsline {subsection}{\numberline {6.1.1}The C Preprocessor}{119}{subsection.6.1.1}
\contentsline {subsection}{\numberline {6.1.2}The Actual Compiler, CC1, and the Assembler, AS}{120}{subsection.6.1.2}
\contentsline {section}{\numberline {6.2}The Linker: What Is Linked?}{121}{section.6.2}
\contentsline {section}{\numberline {6.3}Headers in Executable Files}{121}{section.6.3}
\contentsline {section}{\numberline {6.4}Libraries}{122}{section.6.4}
\contentsline {section}{\numberline {6.5}A Look at the Final Product}{124}{section.6.5}
\contentsline {chapter}{\numberline {7}Subroutines on Intel CPUs}{127}{chapter.7}
\contentsline {section}{\numberline {7.1}Overview}{127}{section.7.1}
\contentsline {section}{\numberline {7.2}Stacks}{127}{section.7.2}
\contentsline {section}{\numberline {7.3}CALL, RET Instructions}{129}{section.7.3}
\contentsline {section}{\numberline {7.4}Arguments}{129}{section.7.4}
\contentsline {section}{\numberline {7.5}Ensuring Correct Access to the Stack}{130}{section.7.5}
\contentsline {section}{\numberline {7.6}Cleaning Up the Stack}{131}{section.7.6}
\contentsline {section}{\numberline {7.7}Full Examples}{131}{section.7.7}
\contentsline {subsection}{\numberline {7.7.1}First Example}{131}{subsection.7.7.1}
\contentsline {subsection}{\numberline {7.7.2}If the PC Points to Garbage, the Machine Will Happily ``Execute'' the Garbage}{134}{subsection.7.7.2}
\contentsline {subsection}{\numberline {7.7.3}Second Example}{135}{subsection.7.7.3}
\contentsline {section}{\numberline {7.8}Interfacing C/C++ to Assembly Language}{136}{section.7.8}
\contentsline {subsection}{\numberline {7.8.1}Example}{137}{subsection.7.8.1}
\contentsline {subsection}{\numberline {7.8.2}Cleaning Up the Stack?}{140}{subsection.7.8.2}
\contentsline {subsection}{\numberline {7.8.3}More Sections}{140}{subsection.7.8.3}
\contentsline {subsection}{\numberline {7.8.4}Multiple Arguments}{141}{subsection.7.8.4}
\contentsline {subsection}{\numberline {7.8.5}Nonvoid Return Values}{141}{subsection.7.8.5}
\contentsline {subsection}{\numberline {7.8.6}Calling C and the C Library from Assembly Language}{142}{subsection.7.8.6}
\contentsline {subsection}{\numberline {7.8.7}Local Variables}{143}{subsection.7.8.7}
\contentsline {subsection}{\numberline {7.8.8}Use of EBP}{144}{subsection.7.8.8}
\contentsline {subsubsection}{\numberline {7.8.8.1}GCC Calling Convention}{144}{subsubsection.7.8.8.1}
\contentsline {subsubsection}{\numberline {7.8.8.2}The Stack Frame for a Given Call}{144}{subsubsection.7.8.8.2}
\contentsline {subsubsection}{\numberline {7.8.8.3}The Stack Frames Are Chained}{146}{subsubsection.7.8.8.3}
\contentsline {subsubsection}{\numberline {7.8.8.4}ENTER and LEAVE Instructions}{147}{subsubsection.7.8.8.4}
\contentsline {subsubsection}{\numberline {7.8.8.5}Application of Stack Frame Structure}{147}{subsubsection.7.8.8.5}
\contentsline {subsection}{\numberline {7.8.9}The LEA Instruction Family}{149}{subsection.7.8.9}
\contentsline {subsection}{\numberline {7.8.10}The Function main() IS a Function, So It Too Has a Stack Frame}{150}{subsection.7.8.10}
\contentsline {subsection}{\numberline {7.8.11}Once Again, There Are No Types at the Hardware Level!}{152}{subsection.7.8.11}
\contentsline {subsection}{\numberline {7.8.12}What About C++?}{154}{subsection.7.8.12}
\contentsline {subsection}{\numberline {7.8.13}Putting It All Together}{154}{subsection.7.8.13}
\contentsline {section}{\numberline {7.9}Subroutine Calls/Returns Are ``Expensive''}{157}{section.7.9}
\contentsline {section}{\numberline {7.10}Debugging Assembly Language Subroutines}{158}{section.7.10}
\contentsline {subsection}{\numberline {7.10.1}Focus on the Stack}{158}{subsection.7.10.1}
\contentsline {subsection}{\numberline {7.10.2}A Special Consideration When Interfacing C/C++ with Assembly Language}{158}{subsection.7.10.2}
\contentsline {section}{\numberline {7.11}Macros}{159}{section.7.11}
\contentsline {section}{\numberline {7.12}Inline Assembly Code for C++}{163}{section.7.12}
\contentsline {chapter}{\numberline {8}Overview of Input/Output Mechanisms}{165}{chapter.8}
\contentsline {section}{\numberline {8.1}Introduction}{165}{section.8.1}
\contentsline {section}{\numberline {8.2}I/O Ports and Device Structure}{166}{section.8.2}
\contentsline {section}{\numberline {8.3}Program Access to I/O Ports}{166}{section.8.3}
\contentsline {subsection}{\numberline {8.3.1}I/O Address Space Approach}{166}{subsection.8.3.1}
\contentsline {subsection}{\numberline {8.3.2}Memory-Mapped I/O Approach}{167}{subsection.8.3.2}
\contentsline {section}{\numberline {8.4}Wait-Loop I/O}{168}{section.8.4}
\contentsline {section}{\numberline {8.5}PC Keyboards}{169}{section.8.5}
\contentsline {section}{\numberline {8.6}Interrupt-Driven I/O}{169}{section.8.6}
\contentsline {subsection}{\numberline {8.6.1}Telephone Analogy}{169}{subsection.8.6.1}
\contentsline {subsection}{\numberline {8.6.2}What Happens When an Interrupt Occurs?}{170}{subsection.8.6.2}
\contentsline {subsection}{\numberline {8.6.3}Game Example}{171}{subsection.8.6.3}
\contentsline {subsection}{\numberline {8.6.4}Alternative Designs}{172}{subsection.8.6.4}
\contentsline {subsection}{\numberline {8.6.5}Glimpse of an ISR}{172}{subsection.8.6.5}
\contentsline {subsection}{\numberline {8.6.6}I/O Protection}{173}{subsection.8.6.6}
\contentsline {subsection}{\numberline {8.6.7}Distinguishing Among Devices}{173}{subsection.8.6.7}
\contentsline {subsubsection}{\numberline {8.6.7.1}How Does the CPU Know Which I/O Device Requested the Interrupt?}{173}{subsubsection.8.6.7.1}
\contentsline {subsubsection}{\numberline {8.6.7.2}How Does the CPU Know Where the ISR Is?}{173}{subsubsection.8.6.7.2}
\contentsline {subsubsection}{\numberline {8.6.7.3}Revised Interrupt Sequence}{174}{subsubsection.8.6.7.3}
\contentsline {subsection}{\numberline {8.6.8}How Do PCs Prioritize Interrupts from Different Devices?}{174}{subsection.8.6.8}
\contentsline {section}{\numberline {8.7}Direct Memory Access (DMA)}{175}{section.8.7}
\contentsline {section}{\numberline {8.8}Disk Structure}{176}{section.8.8}
\contentsline {section}{\numberline {8.9}USB Devices}{176}{section.8.9}
\contentsline {chapter}{\numberline {9}Overview of Functions of an Operating System}{179}{chapter.9}
\contentsline {section}{\numberline {9.1}Introduction}{179}{section.9.1}
\contentsline {subsection}{\numberline {9.1.1}It's Just a Program!}{179}{subsection.9.1.1}
\contentsline {subsection}{\numberline {9.1.2}What Is an OS for, Anyway?}{180}{subsection.9.1.2}
\contentsline {section}{\numberline {9.2}Application Program Loading}{182}{section.9.2}
\contentsline {subsection}{\numberline {9.2.1}Basic Operations}{182}{subsection.9.2.1}
\contentsline {subsection}{\numberline {9.2.2}Chains of Programs Calling Programs}{183}{subsection.9.2.2}
\contentsline {subsection}{\numberline {9.2.3}Static Versus Dynaming Linking}{183}{subsection.9.2.3}
\contentsline {subsection}{\numberline {9.2.4}Making These Concepts Concrete: Commands You Can Try Yourself}{184}{subsection.9.2.4}
\contentsline {subsubsection}{\numberline {9.2.4.1}Mini-Example}{184}{subsubsection.9.2.4.1}
\contentsline {subsubsection}{\numberline {9.2.4.2}The strace Command}{184}{subsubsection.9.2.4.2}
\contentsline {section}{\numberline {9.3}OS Bootup}{185}{section.9.3}
\contentsline {section}{\numberline {9.4}Timesharing}{186}{section.9.4}
\contentsline {subsection}{\numberline {9.4.1}Many Processes, Taking Turns}{186}{subsection.9.4.1}
\contentsline {subsection}{\numberline {9.4.2}Example of OS Code: Linux for Intel CPUs}{187}{subsection.9.4.2}
\contentsline {subsection}{\numberline {9.4.3}Process States}{189}{subsection.9.4.3}
\contentsline {subsection}{\numberline {9.4.4}What About Background Jobs?}{190}{subsection.9.4.4}
\contentsline {subsection}{\numberline {9.4.5}Threads: ``Lightweight Processes''}{191}{subsection.9.4.5}
\contentsline {subsubsection}{\numberline {9.4.5.1}The Mechanics}{191}{subsubsection.9.4.5.1}
\contentsline {subsubsection}{\numberline {9.4.5.2}Threads Example}{192}{subsubsection.9.4.5.2}
\contentsline {subsection}{\numberline {9.4.6}Making These Concepts Concrete: Commands You Can Try Yourself}{194}{subsection.9.4.6}
\contentsline {section}{\numberline {9.5}Virtual Memory}{196}{section.9.5}
\contentsline {subsection}{\numberline {9.5.1}Make Sure You Understand the Goals}{196}{subsection.9.5.1}
\contentsline {subsubsection}{\numberline {9.5.1.1}Overcome Limitations on Memory Size}{196}{subsubsection.9.5.1.1}
\contentsline {subsubsection}{\numberline {9.5.1.2}Relieve the Compiler and Linker of Having to Deal with Real Addresses}{197}{subsubsection.9.5.1.2}
\contentsline {subsubsection}{\numberline {9.5.1.3}Enable Security}{197}{subsubsection.9.5.1.3}
\contentsline {subsection}{\numberline {9.5.2}The Virtual Nature of Addresses}{197}{subsection.9.5.2}
\contentsline {subsection}{\numberline {9.5.3}Overview of How the Goals Are Achieved}{198}{subsection.9.5.3}
\contentsline {subsubsection}{\numberline {9.5.3.1}Overcoming Limitations on Memory Size}{198}{subsubsection.9.5.3.1}
\contentsline {subsubsection}{\numberline {9.5.3.2}Relieving the Compiler and Linker of Having to Deal with Real Addresses}{199}{subsubsection.9.5.3.2}
\contentsline {subsubsection}{\numberline {9.5.3.3}Enabling Security}{199}{subsubsection.9.5.3.3}
\contentsline {subsubsection}{\numberline {9.5.3.4}Is the Hardware Support Needed?}{200}{subsubsection.9.5.3.4}
\contentsline {subsection}{\numberline {9.5.4}Who Does What When?}{201}{subsection.9.5.4}
\contentsline {subsection}{\numberline {9.5.5}Details on Usage of the Page Table}{201}{subsection.9.5.5}
\contentsline {subsubsection}{\numberline {9.5.5.1}Virtual-to-Physical Address Translation, Page Table Lookup}{201}{subsubsection.9.5.5.1}
\contentsline {subsubsection}{\numberline {9.5.5.2}Layout of the Page Table}{203}{subsubsection.9.5.5.2}
\contentsline {subsubsection}{\numberline {9.5.5.3}Page Faults}{204}{subsubsection.9.5.5.3}
\contentsline {subsubsection}{\numberline {9.5.5.4}Access Violations}{205}{subsubsection.9.5.5.4}
\contentsline {subsection}{\numberline {9.5.6}VM and Context Switches}{207}{subsection.9.5.6}
\contentsline {subsection}{\numberline {9.5.7}Improving Performance---TLBs}{207}{subsection.9.5.7}
\contentsline {subsection}{\numberline {9.5.8}The Role of Caches in VM Systems}{208}{subsection.9.5.8}
\contentsline {subsubsection}{\numberline {9.5.8.1}Addressing}{208}{subsubsection.9.5.8.1}
\contentsline {subsubsection}{\numberline {9.5.8.2}Hardware Vs. Software}{208}{subsubsection.9.5.8.2}
\contentsline {subsection}{\numberline {9.5.9}Making These Concepts Concrete: Commands You Can Try Yourself}{209}{subsection.9.5.9}
\contentsline {section}{\numberline {9.6}A Bit More on System Calls}{209}{section.9.6}
\contentsline {section}{\numberline {9.7}OS File Management}{212}{section.9.7}
\contentsline {section}{\numberline {9.8}To Learn More}{212}{section.9.8}
\contentsline {section}{\numberline {9.9}Intel Pentium Architecture}{212}{section.9.9}
\contentsline {chapter}{\numberline {10}Example of RISC Architecture: MIPS}{215}{chapter.10}
\contentsline {section}{\numberline {10.1}Introduction}{215}{section.10.1}
\contentsline {section}{\numberline {10.2}A Definition of RISC}{217}{section.10.2}
\contentsline {section}{\numberline {10.3}Beneficial Effects for Compiler Writers}{218}{section.10.3}
\contentsline {section}{\numberline {10.4}Introduction to the MIPS Architecture}{218}{section.10.4}
\contentsline {subsection}{\numberline {10.4.1}Register Set}{219}{subsection.10.4.1}
\contentsline {subsection}{\numberline {10.4.2}Example Code}{219}{subsection.10.4.2}
\contentsline {subsection}{\numberline {10.4.3}MIPS Assembler Pseudoinstructions}{221}{subsection.10.4.3}
\contentsline {subsection}{\numberline {10.4.4}Programs Tend to Be Longer on RISC Machines}{223}{subsection.10.4.4}
\contentsline {subsection}{\numberline {10.4.5}Instruction Formats}{223}{subsection.10.4.5}
\contentsline {subsection}{\numberline {10.4.6}Arithmetic and Logic Instruction Set}{225}{subsection.10.4.6}
\contentsline {subsection}{\numberline {10.4.7}Conditional Branches in MIPS}{225}{subsection.10.4.7}
\contentsline {section}{\numberline {10.5}Some MIPS Op Codes}{226}{section.10.5}
\contentsline {section}{\numberline {10.6}Dealing with Branch Delays}{226}{section.10.6}
\contentsline {subsection}{\numberline {10.6.1}Branch Prediction}{226}{subsection.10.6.1}
\contentsline {subsection}{\numberline {10.6.2}Delayed Branch}{227}{subsection.10.6.2}
\contentsline {chapter}{\numberline {11}The Java Virtual Machine }{229}{chapter.11}
\contentsline {section}{\numberline {11.1}Background Needed}{229}{section.11.1}
\contentsline {section}{\numberline {11.2}Goal}{229}{section.11.2}
\contentsline {section}{\numberline {11.3}Why Is It a ``Virtual'' Machine?}{229}{section.11.3}
\contentsline {section}{\numberline {11.4}The JVM Architecture}{230}{section.11.4}
\contentsline {subsection}{\numberline {11.4.1}Registers}{231}{subsection.11.4.1}
\contentsline {subsection}{\numberline {11.4.2}Memory Areas}{232}{subsection.11.4.2}
\contentsline {section}{\numberline {11.5}First Example}{233}{section.11.5}
\contentsline {subsection}{\numberline {11.5.1}Java Considerations}{233}{subsection.11.5.1}
\contentsline {subsection}{\numberline {11.5.2}How to Inspect the JVM Code}{234}{subsection.11.5.2}
\contentsline {subsection}{\numberline {11.5.3}The Local Variables Section of main()}{235}{subsection.11.5.3}
\contentsline {subsection}{\numberline {11.5.4}The Call of Min() from main()}{235}{subsection.11.5.4}
\contentsline {subsection}{\numberline {11.5.5}Accessing Arguments from within Min()}{236}{subsection.11.5.5}
\contentsline {subsection}{\numberline {11.5.6}Details on the Action of Jumps}{237}{subsection.11.5.6}
\contentsline {subsection}{\numberline {11.5.7}Multibyte Numbers Embedded in Instructions}{237}{subsection.11.5.7}
\contentsline {subsection}{\numberline {11.5.8}Calling Instance Methods}{237}{subsection.11.5.8}
\contentsline {subsection}{\numberline {11.5.9}Creating and Accessing Arrays}{239}{subsection.11.5.9}
\contentsline {subsection}{\numberline {11.5.10}Constructors}{240}{subsection.11.5.10}
\contentsline {subsection}{\numberline {11.5.11}Philosophy Behind the Design of the JVM}{240}{subsection.11.5.11}
\contentsline {subsubsection}{\numberline {11.5.11.1}Instruction Structure}{240}{subsubsection.11.5.11.1}
\contentsline {subsubsection}{\numberline {11.5.11.2}Stack Architecture}{240}{subsubsection.11.5.11.2}
\contentsline {subsubsection}{\numberline {11.5.11.3}Safety}{241}{subsubsection.11.5.11.3}
\contentsline {section}{\numberline {11.6}Another Example}{241}{section.11.6}
\contentsline {section}{\numberline {11.7}Yet Another Example}{244}{section.11.7}
\contentsline {section}{\numberline {11.8}Overview of JVM Instructions}{251}{section.11.8}
\contentsline {section}{\numberline {11.9}References}{256}{section.11.9}