\documentstyle[twocolumn]{article}

\setlength{\oddsidemargin}{0in}
\setlength{\evensidemargin}{0in}
\setlength{\topmargin}{-0.3in}
\setlength{\headheight}{0in}
\setlength{\headsep}{0in}
\setlength{\textwidth}{6.5in}
\setlength{\textheight}{9.8in}
\setlength{\parindent}{0in}
\setlength{\parskip}{0.1in}
\setlength{\columnseprule}{0.4pt}

\begin{document}

\bf
\hfill Name:  $\underline{ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \
\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }$
% \_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_
\rm
\bigskip
                                      
{\bf Directions:} Work on this sheet (both sides, if needed) only;
{\bf do not turn in any supplementary sheets of paper}.  There is actually
plenty of room for your answers, as long as you organize yourself
BEFORE starting writing.  In order to get full credit,
{\bf WRITE LEGIBLY}
($\infty$ points off for illegible handwriting!), and
{\bf SHOW YOUR WORK.}

{\bf 1.}  (10) Fill in the blank:  The action in which a disk read/write
head moves from one track (cylinder) to another is called a
\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_.

{\bf 2.}  (5) Fill in the blank:  The standard for the Internet protocols was
set by the \_\_\_\_\_\_\_\_\_\_\_\_ operating system.
 
{\bf 3.}  (10) Fill in the blank with either ``UDP'' or ``TCP'':  Of the
UDP and TCP protocols, \_\_\_\_\_\_\_\_\_\_\_\_\_ is the one which
requires more handshaking.

{\bf 4.} (10) Suppose we have a memory-mapped I/O system, and that a
certain I/O device has ports 50 and 51, the former for data and the
latter for indicating a ``character ready'' condition (1 means ready, 0
means not ready).  Consider the code

\begin{verbatim}
T:  MOV R2,[51]
    JZ T   (jump to T if Zero bit is set)
    MOV R2,[50]
    MOV [1000],R2
\end{verbatim}

Fill in the blank:  The type of I/O being used here is called
\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_.

{\bf 5.}  Suppose we have a set of two mirrored disks, named disk 0
and disk 1, containing 100 tracks each.  In the beginning, the
read/write heads of the two disks are positioned over tracks 12 and 52,
respectively.  Then there are accesses to the system:  A read on track
15; a read on track 40; a write to track 38.

\begin{itemize}

\item [(a)] (10) Fill in the blanks with numbers:  After the second
access (read on 40), the read/write head of disk 0 will be positioned
over track \_\_\_\_\_\_\_\_ and that of disk 1 will be positioned over
track \_\_\_\_\_\_\_\_.

\item [(b)] (10) Fill in the blanks with numbers:  After the third
access (write to 38), the read/write head of disk 0 will be positioned
over track \_\_\_\_\_\_\_\_ and that of disk 1 will be positioned over
track \_\_\_\_\_\_\_\_.

\end{itemize}

{\bf 6.}  This problem concerns the bus performance analysis on
pp.665-666.

\begin{itemize}

\item [(a)]  (10) Suppose the phrase ``4-word'' next to the
green-highlighted word ``Answer'' on p.665 is changed to ``8-word.''
What will the numbe 2880 change to?

\item [(b)]  (10) Suppose that in Characteristic 4, p.665, the time for
additional accesses is 30 ns instead of 20 ns.  What would the figure
812 on p.666 change to?

\end{itemize}

\vskip 1.5in

{\bf 7.}  (5) Explain why even a home PC could be called a ``multiprocessor
system.''

\vskip 1.5in

{\bf 8.}  (10) Fill in the blank:   The name of the TRAP instruction in the
MIPS instruction set is \_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_.

{\bf 9.}  (10) Assume the same conditions we had in our example in class
of computing average seek time, except that now the two accesses are not
assumed to be fully independent.  In order to model temporal locality,
we will assume that half the time Y = X and the other half of the time Y
is chosen randomly among the tracks 1 to 100 independently of X.  Find
the average seek time, expressed as a double sum as in class (do NOT
evaluate the sum).

\bigskip

{\bf Solutions:}

1.  Seek.

2.  Unix.

3.  TCP.

4.  Polling.

5.a.  15, 40.

5.b.  38, 38.

6.a.  1 + 40 + 2 x (2+2) = 49 cycles per block; 256/8 = 32 blocks;
49 x 32 = 1568 cycles in all.

6.b.  Need a ``Step 5'' on p.666, since the reads after the first
take 6 cycles instead of 4.  ``Step 5'' is 2 cycles.  Thus we
need 1 + 40 + 4 x (2+2+2) = 65 cycles per block.  There are still
16 blocks, so we need 65 x 16 = 1040 cycles in all.  (The figure
1008 is also acceptable.)

7.  A DMA controller acts as a simple CPU, writing to and reading
from memory.

8.  Syscall.

9.  The answer is half the original figure, or about 16.

\end{document}