Homework 3

Due Friday, October 31

Directions for submission:

Use Chipmunk in both problems below. Set up two directories, named ProblemA and ProblemB, each one containing the .lgf files for that problem, a README file stating how to load those files with Chipmunk, and (for Problem B), your memory-contents files. Don't forget to label well, and to include Hex Keypads and Displays, and a Digital Pulse Generative Switch for your "clock." Use tar to combine the two directories, and then use gzip and uuencode as usual. In the latter case, set things up so that when the Reader uses uudecode, it will produce a file named Hwk3.tar.gz.

Problem A:

Build a pipelined binary-search machine, applied to a sorted nonnegative 4-bit integer array Z of length 8. Implement Z as 8 registers.

The input to the pipe is a nonnegative integer X, and the output is the index (0-7) of the array element which X matches. (It is assumed that X is guaranteed to match some element.)

Here is a description of the algorithm as it might be written in C:

   Low = 0;  High = 8;
   while (1)  {
      Try = (Low + High) / 2;
      if (X == Z[Try])  {
         Low = High = Try;
	 break;
      }
      if (X > Z[Try])  Low = Try;
      else High = Try;
   }

Your design is required to consist of four identical stages, each of having as inputs X and the values of Low and High (as in the first line after the "while" line above), and outputs X and the new values of Low and High (as exist just after the "else" line above). Note that your circuit will not (and need not) do anything corresponding to the "break" in the code above.

Make sure your design is indeed a pipeline; that is, as long as there is a continual input of new X's, at any given time there will be four searches in progress, one for each of four X values.

As you know, division by 2 is equivalent to a 1-bit rightward shift. However, do NOT use a shifter component for this. Instead, just route wires "diagonally."

Problem B:

Implement the four-way low-order interleaved memory system as shown in our notes, except that address sizes will be 15 bits instead of 16 and word size will be 8 bits instead of 16. You will implement only the "read" portion of the system.

Your design will include four SRAM8K components to implement the Mi's, four registers between the Mi's and the MUX, and some "glue" (this is a term meaning "miscellaneous digital logic to complete the design).

The latter will compare the previous value of A[14:2] to the currently-requested one; if they are equal, the memory item will be fetched from one of registers, and otherwise four new fetches from the Mi's will be performed before fetching from one of the registers is performed. NOTE THAT THIS IS THE CENTRAL POINT OF LOW-ORDER INTERLEAVING, so make sure your design does this.

There will be no "CPU". Instead, just use Hex Keypads to play the role of the "MAR", a Digital Pulse Generative Switch to generate your memory read requests, and Hex Displays as your "MBR".

Chipmunk allows you to load SRAM8K's from disk files, so set up such files with enough values to allow good testing of your circuit. That would mean values for at least 8 consecutive memory locations, and probably more.