Homework IV

Due in stages

Problem 1, due Thursday, November 6:

Here you will implement a memory system with the following specs:

Be extra careful in testing, as some errors might be masked if you do not test carefully.

Problem 2, due Friday, November 14:

Here you will develop a 16Kx4 memory, using a single SRAM8K chip. Addresses 2k and 2k+1 of the system memory will be stored in the lower and upper four bits of address k of the SRAM8K chip, k = 0, 1, ..., 8K-1; note that system addresses are 14 bits wide, whereas SRAM8K addresses consist of only 13 bits. The memory will be read-only (which simply means that you don't have to worry about writes; no special circuitry is needed).

Your bus will consist of lines A0-A12 (not A0-A13) and D0-D7. Note that the latter means that you fetch two system words, not one, with each memory access, a scheme intended to improve overall speed. We will use the terms requested word and co-word, respectively, to refer to the system word the CPU currently wants to fetch and use, and the other system word stored in the same SRAM8K word.

Your simulated CPU will be a bit complex, consisting of the following:

Here is what these various components do:

You will need at least one clock pulse, in order to load the data register, and if appropriate, the cache. Feel free to use more than one clock cycle if you need it. Similarly, feel free to have a counter for clock pulses, to serve as a state indicator. Of course, you will have various hex keypads and displays, e.g. a keypad in order to load the address register with a test address.

As you know, Chipmunk does not have any refined notion of timing. Thus, short of putting in artificial delays, we cannot model the fact that cache access is faster than memory access. Nevertheless, to make things realistic, make SURE that the CPU does not put an address on the bus until after it has found that the requested word is not available in the cache.

Load your test data into the SRAM8K either by loading from a disk file or by using CNFG mode.

The nominal due date for this problem is Wednesday, November 12. This means that I will be open to extending the due date if, as November 12 approaches, I find that most students have made considerable progress on this problem but could use some extra time.